Thread View: comp.cad.cadence
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2 total messages
Started by "S. Badel"
Wed, 16 Jul 2003 10:26
problem simulating with standard cells
Author: "S. Badel"
Date: Wed, 16 Jul 2003 10:26
Date: Wed, 16 Jul 2003 10:26
14 lines
470 bytes
470 bytes
i try to do post-layout simulation. my layout contains standard cells for which the full layout is not available, only an abstract layout view & schematic (cmos_sch). I extracted those cells as macro cells. The netlister generates errors because the abstract view contains pins for vdd! & gnd!, while the cmos_sch view doesn't. "terminal 'gnd!' found in cell 'somecell' view 'layout' does not exist in cell 'somecell' view 'cmos_sch'" how can i get around this?
Re: problem simulating with standard cells
Author: Kholdoun TORKI
Date: Sun, 20 Jul 2003 15:10
Date: Sun, 20 Jul 2003 15:10
59 lines
1717 bytes
1717 bytes
Stephane, I don't understand why this happen again. It worked perfectly long time ago with the design-kit under 4.3.4. But now with the 4.4.XXX the problem is re-appearing as for the design-kit for 4.2.XX (very long time ago). Anyway, I have found a workaround that may help you : Edit your "extracted" view and try this piece of code in the CIW : cv = geGetEditCellView() foreach( Inst cv~>instances if( Inst~>viewName == "abstract_mlvs" then foreach( instanceTerminal Inst~>instTerms if(instanceTerminal~>name == "vdd!" then dbDeleteObject( instanceTerminal ) ) if(instanceTerminal~>name == "gnd!" then dbDeleteObject( instanceTerminal ) ) Inst~>instHeader~>viewName = "symbol"; ) ) ) auLvsFixTimeStamps(cv) dbSave(cv) If you are using the "abstract" views for the instances in your layout, you have to replace this in the 3rd line above. I'm sure that there is a more elegant and standard way to do, and I'm interrested if someone knows. Regards, ================================================================ Kholdoun TORKI http://cmp.imag.fr ================================================================ S. Badel wrote: > i try to do post-layout simulation. my layout contains standard cells for > which the > full layout is not available, only an abstract layout view & schematic > (cmos_sch). > I extracted those cells as macro cells. The netlister generates errors > because > the abstract view contains pins for vdd! & gnd!, while the cmos_sch view > doesn't. > "terminal 'gnd!' found in cell 'somecell' view 'layout' does not exist > in cell 'somecell' view 'cmos_sch'" > > how can i get around this? > >
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